Oskar II

The OZi OSKAR II is a fully self-contained processor block optimised for “C”.

Features:

• 8051 core processor
• 128 K bytes Flash Program Memory
• 32K Bytes Data EEPROM
• 2K Bytes External SRAM (on board)
• 512 bytes Internal SRAM
• 24 I/O lines
• Master / Slave I2C BUS
• Full Duplex Enhanced UART
• Programmable baud rate generator
• IMbit CAN BUS ( 2.0B PeliCAN)
• 6 x 10bit ADC (0-5v, fast 8bit)
• 3x16 bit Timers
• Watchdog timer
• 4 Level Priority Interrupt, 15 sources
• 1 x 8 Bit Pulse Width Modulation Output
• Optimised for C programming
• 5V operation
• 40 Pin DIP Package (Big Dip )

 Special Features:

• 18 I/O can be configured with 16 input micro cells or 24 output micro cells to implement keyboard scanning; display drivers; mapped Device drivers’ etc.
• 16 I/O can be configured as Add. or Data bus I/O
• JTAG Programming (on board)
• ISP via JTAG port
• Re-configurable memory on the fly for ISP .